Thread Divergence Reduction in Path Tracer using Custom Thread Scheduler

Abstract

This master thesis’ main purpose is to research, implement and experiment improved and innovative methods to reduce thread divergence in the path tracer algorithm. The main research question this work aims to answer is how to make the path tracer algorithm more memory and control flow coherent. Better ray coherency would utilize the SIMT model better, thus, ensuring higher performance of the GPU.

The main suggested method includes the incorporation of thread reordering compute shaders that aim to group threads into the same warps based on the last bounce’s spatial information. For the sorting algorithm, a parallel bitonic sort is used and the current state-of-the-art radix sort is suggested as an alternative. The sorting elements include sorting keys that derive from the position and direction of the rays.

Specifically, the sorting keys involve the estimated termination points of the rays from the previous bounce. We start with using a fixed length that derives from the scene’s bounds to confirm our hypothesis, whether ray reordering can reduce thread divergence and improve the overall performance. Furthermore, three distinct formulas are examined and compared. These include calculating and caching the average, the moving average, and approximated gaussian distributions of the rays’ lengths. Finally, we examined clamping the spatial grid’s values based on a fixed distance from the camera’s position, as it could potentially yield interesting results.